Samsung 3D Stacked DDR4 DRAM Brings Via-Mid Techno 2015-08-12

System Plus Consulting, sister company of Yole Développement (Yole), released its new reverse costing report, Samsung 3D TSV stacked DDR4 DRAM. In August 2014 Samsung announced the mass production of the first analyzed 3D TSV technology based DDR4 modules for enterprise servers.According to Samsung, this new module, because of its high density and high performance will play a key role in supporting the enterprise servers’ development and cloud-based applications, as well as further diversification of data center solutions.

Reverse costing analysis from System Plus Consulting includes a physical analysis at the module, package, DRAM die and cross-section level, the dedicated manufacturing process flow (TSV & bumping manufacturing step – Flip-chip & stacking process – package assembly unit) and a detailed cost analysis per process step.

According to Yole, 3D TSV technology is expected to reach $4.8B billion in revenues by 2019, mainly driven by 3D stacked DRAM
and followed by 3D Logic/Memory and Wide I/O (Source: 3DIC & 2.5D TSV Interconnect for Advanced Packaging 2014 Business Update,
October 2014). With 40% share in the DRAM market, Samsung is by far the number 1 player. By introducing 3D TSV stacking in
their latest 64Gb DDR4, Samsung allows this technology to enter in the main stream.

Samsung portfolio of DDR4-based modules using 20nm-class process technology includes registered dual in line memory modules
(RDIMMs) and load-reduced DIMMs (LRDIMMs). These memory modules are available with initial speeds up to 2400 Mbps, increasing
to the Joint Electron Devices Engineering Council (JEDEC)-defined 3200 Mbps.

This registered dual Inline memory module (RDIMM) includes 36 DDR4 DRAM chips (ref. K4AAG045WD), each of which consists of four 4Gb
DDR4 DRAM dies (Ref. K4A4G085WD). The chips are manufactured using Samsung’s 20nm process technology and 3D TSV via-middle package technology. As a result, the new 64Gb TSV module performs twice as fast as a 64Gb module that uses wire bonding packaging, while consuming approximately half the power.

“On the process side, Samsung used a temporary bonding approach using adhesive glue material and copper via-filled using bottom up filling”, details Romain Fraux, Project Manager, MEMS Devices, IC’s and Advanced Packaging at System Plus Consulting. And he adds: “At System Plus Consulting, we paid particular attention in identifying all technical choices made by Samsung on process and equipment (wafer bonding, DRIE via etching, via filling, bumping, underfill…).” System Plus Consulting has published more than 100 reverse costing reports on advanced packaging, MEMS and more… Detailed descriptions and related samples are available on i-micronews, reports section.

“Reverse Costing is the process of disassembling a device to identify manufacturing technology and calculate cost”, explains Michel Allain, CEO of System Plus Consulting. Since 1993 the company has analyzed hundreds of integrated circuits, modules, electronic boards and systems for the benefit of large corporations in the semiconductor, automotive and telecom, consumer and energy sectors. Based on its technical expertise and its knowledge of the semiconductor industry, the engineering and consulting company has developed a dedicated reverse costing methodology conducted within three phases:

  • Teardown analysis: Under this phase, package is analyzed and measured. Dies are extracted in order to get overall data such as dimensions, main blocks, pad number and pin out, die marking. Then System Plus Consulting‘s team is working on all manufacturing process steps in order to provide detailed description and analysis.
  • Costing analysis: this phase includes a detailed analysis of the manufacturing environment and the cost simulation of the process steps.
  •  Selling price analysis: this phase is based on the supply chain analysis as well as the analysis of the selling price.